 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| asdl-3023 irda ? data compliant low power 4mbit/s with remote control infrared transceiver data sheet features general features ? operating temperature from -25 c ~ 85c - critical parameters are guaranteed over temperature and supply voltage ? vcc supply 2.4 to 3.6 v ? interface to various super i/o and controller devices - input/output interface voltage of 1.5 v ? miniature package miniature package (shielded) height : 1.75 mm height : 1.95 mm width : 7.5 mm width : 8.0 mm depth : 2.75 mm depth : 3.00 mm ? moisture level 3 ? power saving using 3 iled range (sir, mir/fir, rc mode) ? led stuck high protection ? high emi performance ? high esd performance ? designed to accommodate light loss with cosmetic windows ? iec 825-class 1 eye safe irda ? features ? fully compliant to irda 1.4 physical layer low power specifcations from 9.6 kbit/s to 4.0 mb/s - link distance up to 30cm (minimum) ? complete shutdown ? low power consumption - low shutdown current - low idle current remote control features ? wide angle and high radiant intensity ? spectrally suited to remote control transmission function ? minimum peak wavelength of 880nm ? 2 rc transmission mode - single txd (programmable mode) - dual txd (direct) description the asdl-3023 is a new generation low profle high speed enhanced infrared (ir) transceiver module that provides the capability of (1) interface between logic and ir signals for through-air, serial, half-duplex ir data link, and (2) ir remote control transmission for universal remote control applications. the asdl-3023 can be used for irda as well as remote control application without the need of any additional external components for multi - plexing. the asdl-3023 is fully compliant to irda ? physical layer specifcation version 1.4 low power from 9.6 kbit/s to 4.0 mbit/s (fir) and iec825 class 1 eye safety standards. the asdl-3023 can be shutdown completely to achieve very low power consumption. in the shutdown mode, the pin diode will be inactive and thus producing very little photocurrent even under very bright ambient light. it is also designed to interface to input/output logic circuits as low as 1.5v. these features are ideal for battery operated mobile devices such as pdas and mobile phones that require low power consumption. applications mobile data communication and universal remote control ? mobile phones ? pdas ? digital still camera ? printer ? handy terminal ? industrial and medical instrument application support information the application engineering group is available to assist you with the application design associated with asdl- 3023 infrared transceiver module. you can contact them through your local sales representatives for additional details.
figure 1a. functional block diagram of asdl-3023 asdl-3023 transceiver module transceiver ic leda (1) vdd (7) rxd(3) output ? buffer rc_buffer ey e safety-ir gnd receiver photodetector amplifier low pas s filte r regulate d voltage & current source transmi t ter transmitter gnd (8) cx1 cx2 vdd txd_i r inpu t ey e safety-r c txd_rc inpu t ir_buffer switched current source iovcc(5) sd(4) le d txd_ir(2) agc & signal referenc e processo r txd_rc(6) r2 vled cx5 cx4 cx3 r1 figure 1b. functional block diagram of ASDL-3023-S21 asdl-3023 transceiver module transceiver ic leda (1) vdd (7) rxd(3) output buffer rc_buffer ey e safety-ir gnd receiver photodetecto r amplifier low pas s filte r regulated voltage & current source transmi t ter transmitter gnd (8) cx1 cx2 vdd txd_i r input ey e safety-r c txd_rc input ir_buffer switched current source iovcc(5) sd(4) led txd_ir(2) agc & signal reference processor txd_rc(6) r2 vled cx5 cx4 cx3 r1 shield 4 notes: 1. tied through external resistor, r2, to vled. refer to the table below for recommended series resistor value. 2. this pin is used to transmit serial data when sd pin is low. if held high for longer than 50 m s, the led is turned of. do not foat this pin. 3. this pin is capable of driving a standard cmos or ttl load. no external pull-up or pull-down resistor is required. the pin is in tri-state when the transceiver is in shutdown mode 4. complete shutdown of ic and pin diode. the pin is used for setting ir receiver bandwidth, range of ir led current and rc drive programming mode. refer to section on bandwidth selection timing and remote control drive modes for more information. do not foat this pin. *** 5. connect to asic logic controller supply voltage or vcc. the voltage at this pin should be equal to or less than vcc. 6. logic high turns on the rc led. if held high longer than 50 m s, the rc led is turned of. do not foat the pin. 7. (i) regulated, 2.4v to 3.6v (ii) this pin recommended to turn on before other pin. 8. connect to system ground. marking information the unit is marked with xywll on the shield y = year w = work week ll = lot number order information part number packaging type package quantity asdl-3023-021 tape and reel front option 2500 asdl-3023-008 tape and reel top option 2500 asdl-3023Cs21 (shielded) tape and reel front option 2500 i/o pins confguration table pin symbol description i/o type notes 1 leda led anode note 1 2 txd_ir irda transmitter data input. input. active high note 2 3 rxd irda receive data output. active low note 3 4 sd shutdown input. active high note 4 5 iovcc input/output asic voltage note 5 6 txd_rc rc transmitter data input. input. active high note 6 7 vcc supply voltage note 7 8 gnd ground note 8 asdl-3023-021, asdl-3023-008 and ASDL-3023-S21 pinout, rear view figure 2a. pin out for asdl-3023-021 and asdl-3023-008, figure 2b. pin out for ASDL-3023-S21 8 6 4 7 5 2 3 1 rear view 8 6 4 7 5 2 3 1 rear view (shielded) recommended application circuit components component recommended value note r1 4.7 w ,5%, 0.25 watt for vcc f 3.0v r2 2.7 w , for 2.4 f vled f 2.7v; 3.3 w , for 2.7 electrical and optical specifcations specifcations (min. & max. values) hold over the recommended operating conditions unless otherwise noted. unspeci - fed test conditions may be anywhere in their operating range. all typical values (typ.) are at 25c, vcc set to 3.0v and iovcc set to 1.5v unless otherwise noted. receiver parameter symbol min. typ. max. units conditions viewing angle 2 q 1/2 30 peak sensitivity wavelength l p 875 nm rxd_irda output voltage logic high v oh iovcc C 0.5 iovcc v i oh = -200 m a, ei f 0.3 m w/cm 2 logic low v ol 0 0.4 v rxd_irda pulse width (sir) [4, 5] t rpw(sir) 1 4 m s q 1/2 f 15, c l =9pf rxd_irda pulse width (mir) [4, 6] t rpw(mir) 100 500 ns q 1/2 f 15, c l =9pf rxd_irda pulse width (single) (fir) [4, 7] t rpw(fir) 80 175 ns q 1/2 f 15, c l =9pf rxd_irda pulse width (double) (fir) [4, 7] t rpw(fir) 200 290 ns q 1/2 f 15, c l =9pf rxd_irda rise & fall times t r , t f 60 ns c l =9pf receiver latency time [8] t l 100 m s ei = 9.0 m w/cm 2 receiver wake up time [9] t rw 200 m s ei = 10 mw/cm 2 infrared (ir) transmitter parameter symbol min. typ. max. units conditions ir radiant intensity (sir mode) i eh 4 20 mw/sr ir_i leda = 65ma, q 1/2 f 15, txd_ir v ih , t a = 25c ir radiant intensity (mir/fir mode) i eh 10 50 mw/sr ir_i leda = 150ma, q 1/2 f 15, txd_ir v ih , t a = 25c ir viewing angle 2 q 1/2 30 60 ir peak wavelength l p 850 885 900 nm txd_irda logic levels high v ih iovcc-0.5 iovcc v low v il 0 0.5 v txd_irda input current high i h 0.02 m a v i v ih low i l -0.02 m a 0 f v i f v il wake up time [10] t tw 180 ns maximum optical pulse width [11] t pw(max) 25 120 m s txd pulse width (sir) t pw(sir) 1.6 m s t pw (txd_ir)=1.6 m s at 115.2 kbit/s txd pulse width (mir) t pw(mir) 217 ns t pw (txd_ir)=217ns at 1.152 mbit/s txd pulse width (fir) t pw(fir) 125 ns t pw (txd_ir)=125ns at 4.0 mbit/s txd rise & fall times (optical) t r , t f 600 40 ns ns t pw (txd_ir)=1.6 m s at 115.2 kbit/s t pw (txd_ir)=125ns at 4.0 mbit/s ir led anode on-state voltage (sir mode) v on (ir_leda) 2.2 v ir_i leda =65ma, ir vled = 3.6v, r = 4.7 w , vi(txd) vih ir led anode on-state voltage (mir/fir mode) v on (ir_leda) 2.1 v ir_i leda =150ma, ir vled = 3.6v, r = 4.7 w , vi(txd_ir) vih remote control (rc) transmitter parameter symbol min. typ. max. units conditions rc radiant intensity i eh 80 mw/sr rc_i leda = 250ma, q 1/2 f 15, txd_rc v ih , t a = 25 c rc viewing angle 2 q 1/2 30 60 rc peak wavelength l p 880 885 900 nm txd_rc logic levels high v ih iovcc-0.5 iovcc v low v il 0 0.5 v txd_rc input current high i h 0.02 1 m a v i v ih low i l -0.02 1 m a 0 f v i f v il rc led anode on-state voltage v on (rc_leda) 2 v rc_i leda =250ma, rc vled = 3.6v, r = 4.7 w , v i(txd_rc) v ih transceiver parameters symbol min. typ. max. units conditions input current high i h 0.01 1 m a vi vih low i l -1 -0.02 1 m a 0 f vi f vil supply current shutdown i cc1 1 m a vsd iov cc -0.5, ta=25c idle (standby) i cc2 2.0 2.9 ma v i(txd) f v il , ei=0 active i cc3 3.5 ma v i(txd) v il , ei=10mw/cm 2 note: [4] an in-band optical signal is a pulse/sequence where the peak wavelength, l p , is defned as 850 nm f l p f 900 nm, and the pulse characteristics are compliant with the irda serial infrared physical layer link specifcation version 1.4. [5] for in-band signals 115.2 kbit/s where 9 m w/cm2 f ei f 500 mw/cm2. [6] for in-band signals 1.152 mbit/s where 22 m w/cm2 f ei f 500 mw/cm2. [7] for in-band signals 4 mbit/s where 22 m w/cm2 f ei f 500 mw/cm2. [8] latency is defned as the time from the last txd_irda light output pulse until the receiver has recovered full sensitivity. [9] receiver wake up time is measured from vcc power on to valid rxd_irda output. [10] transmitter wake up time is measured from vcc power on to valid light output in response to a txd_irda pulse. [11] the max optical pw is defned as the maximum time which the ir led will turn on, this, is to prevent the long turn on time for the ir led. figure 3. maximum peak ir led current vs. ambient temperature. derated based on tjmax = 100 c. figure 4. maximum peak rc led current vs. ambient temperature. derated based on tjmax = 100 c. max. permissible peak led current 0 50 100 150 200 250 300 350 -40 -20 0 2 0 4 0 6 0 8 0 100 t a - ambient temperature - o c i led(pk) maximum peak led current - ma max. permissible dc led current 0 10 20 30 40 50 60 70 -40 -20 0 2 0 4 0 6 0 8 0 100 t a - ambient temperature - o c i led(dc) , maximum dc led current - ma r ja = 400degc/w figure 5a. timing waveform - rxd output waveform figure 5b. timing waveform - led optical waveform figure 5c. timing waveform C txd stuck-on protection waveform figure 5d. timing waveform C receiver wakeup time waveform figure 5e. timing waveform C txd wakeup time waveform 0 package dimension: asdl-3023-021 (shieldless, front) and asdl-3023-008 (shieldless, top) package dimension: ASDL-3023-S21 (shielded, front) tape & reel dimensions asdl-3023-021 (shieldless, front) asdl-3023-008 (shieldless, top) ASDL-3023-S21 (shielded, front) unit: mm label detail a option # "b" 330 80 quantity 2500 021 "c" ? 13.0 0.5 2.0 0.5 21 0.8 r1. 0 detail a 2.0 0.5 16.4 +2 0 b c progressive directio n empt y (40mm min) parts mounted leader (400mm min) empt y (40mm min) s21 008 330 330 80 80 2500 2500 4 asdl-3023 moisture proof packaging all asdl-3023 options are shipped in moisture proof package. once opened, moisture absorption begins. this part is compliant to jedec level 3. figure 6. baking conditions chart recommended storage conditions storage temperature 10c to 30c relative humidity below 60% rh time from unsealing to soldering after removal from the bag, the parts should be soldered within 7 days if stored at the recommended storage con - ditions. when mbb (moisture barrier bag) is opened and the parts are exposed to the recommended storage con - ditions more than 7 days but less than 15 days the parts must be baked before refow to prevent damage to the parts. note: to use the parts that exposed for more than 15 days is not recommended. baking conditions package temp time in reels 60 c 48hours in bulk 100 c 4hours baking should only be done once. no units in a sealed moisture-proof package environment less than 30 o c and less than 60% rh package is opened (unsealed) package is opened less than 168 hours no baking is necessary yes yes no no parts are not recommended to be used recommended baking conditions package is opened less than 15 day s yes perform recommended refow profle process zone symbol d t maximum d t/ d time or duration heat up p1, r1 25c to 150c 3c/s solder paste dry p2, r2 150c to 200c 100s to 180s solder refow p3, r3 p3, r4 200c to 260c 260c to 200c 3c/s -6c/s cool down p4, r5 200c to 25c -6c/s time maintained above liquidus point , 217c > 217c 60s to 90s peak temperature 260c - time within 5c of actual peak temperature - 20s to 40s time 25c to peak temperature 25c to 260c 8mins the refow profle is a straight-line representation of a nominal temperature profle for a convective refow solder process. the temperature profle is divided into four process zones, each with diferent d t/ d time tem - perature change rates or duration. the d t/ d time rates or duration are detailed in the above table. the tempera - tures are measured at the component to printed circuit board connections. in process zone p1 , the pc board and asdl-3023 pins are heated to a temperature of 150c to activate the fux in the solder paste. the temperature ramp up rate, r1, is limited to 3c per second to allow for even heating of both the pc board and asdl-3023 pins. process zone p2 should be of sufcient time duration (100 to 180 seconds) to dry the solder paste. the temper - ature is raised to a level just below the liquidus point of the solder. 50 100 150 200 250 300 t-time (seconds) 25 80 120 150 180 200 230 255 0 t - temperature (c) r1 r2 r3 r4 r5 217 max 260c 60 sec to 90 sec above 217c p1 heat up p2 solder paste dry p3 solder reflow p4 cool down process zone p3 is the solder refow zone. in zone p3, the temperature is quickly raised above the liquidus point of solder to 260c (500f) for optimum results. the dwell time above the liquidus point of solder should be between 60 and 90 seconds. this is to assure proper co - alescing of the solder paste into liquid solder and the formation of good solder connections. beyond the rec - ommended dwell time the intermetallic growth within the solder connections becomes excessive, resulting in the formation of weak and unreliable connections. the temperature is then rapidly reduced to a point below the solidus temperature of the solder to allow the solder within the connections to freeze solid. process zone p4 is the cool down after solder freeze. the cool down rate, r5, from the liquidus point of the solder to 25c (77f) should not exceed 6c per second maximum. this limitation is necessary to allow the pc board and asdl-3023 pins to change dimensions evenly, putting minimal stresses on the asdl-3023. it is recommended to perform refow soldering no more than twice. appendix a: asdl-3023 smt assembly application note solder pad, mask and metal stencil recommended land pattern for asdl-3023- s21 unit: mm figure a2b. recommended land pattern, ASDL-3023-S21 recommended land pattern for asdl-3023- 008 unit: mm figure a2c. recommended land pattern, asdl-3023-008 figure a1. stencil and pcba recommended land pattern for asdl-3023-021 unit: mm figure a2a. recommended land pattern, asdl-3023-021 0.55 1.05 3.75 1.75 1.35 1.55 7.5 0.775 mounting centre fiducial 0.1 0.55 1.05 3.75 1.75 1.35 1.55 7.5 0.775 1.3 0.3 0.1 mounting centre 1.5 0.55 1.05 3.75 1.60 1.05 1.35 1.74 7.5 0.7 0.4 0.44 mounting centre 0.17 recommended metal solder stencil aperture it is recommended that only a 0.11 mm (0.004 inch) or a 0.127 mm (0.005 inch) thick stencil be used for solder paste printing. this is to ensure adequate printed solder paste volume and no shorting. see the table 1 below the drawing for combinations of metal stencil aperture and metal stencil thickness that should be used. aperture opening for shield pad is 2.6 mm x 1.5 mm(for asdl- 3023-s1) as per land pattern. compared to 0.127mm stencil thickness 0.11mm stencil thickness has longer length in land pattern. it is extended outwardly from transceiver to capture more solder paste volume. figure a3. solder stencil aperture table 1. stencil thickness, t(mm) aperture size(mm) length,l width,w 0.127mm 1.75+/-0.05 0.55+/-0.05 0.11mm 2.4+/-0.05 0.55+/-0.05 l k h j solder mask adjacent land keepout and solder mask areas adjacent land keepout is the maximum space occupied by the unit relative to the land pattern. there should be no other smd components within this area. the minimum solder resist strip width required to avoid solder bridging adjacent pads is 0.2mm.it is recommended that two fdu - cially crosses be placed at mid length of the pads for unit alignment. note: wet/liquid photo-imaginable solder resist/mask is recommended dimension mm h 0.2 l 3.0 k 3.85 j 10.1 appendix b: pcb layout suggestion the efects of emi and power supply noise can potentially reduce the sensitivity of the receiver, resulting in reduced link distance. the pcb layout played an important role to obtain a good psrr and em immunity resulting in good electrical performance. things to note: 1. the ground plane should be continuous under the part, but should not extend under the shield trace. 2. the shield trace is a wide, low inductance trace back to the system ground. cx1, cx2, cx3, cx4 and cx5 are optional supply flter capacitors; they may be left out if a clean power supply is used. 3. vled can be connected to either unfltered or unregulated power supply. the bypass capacitors should be connection before the current limiting resistor r2 respectively. in a noisy environment, including capacitor cx3and cx4 can enhance supply rejection. cx3 that is generally a ceramic capacitor of low inductance providing a wide frequency response while cx4 is tantalum capacitor of big volume and fast frequency response. the use of a tantalum capacitor is more critical on the vled line, which carries a high current. 4. vcc pin can be connected to either unfltered or unregulated power supply. the resistor, r1 together with the capacitors, cx 1and cx2 acts as the low pass flter. 5. iovcc is connected to the asic voltage supply or the vcc supply. the capacitor, cx5 acts as the bypass capacitor. 6. preferably a multi-layered board should be used to provide sufcient ground plane. use the layer underneath and near the transceiver module as vcc, and sandwich that layer between ground connected board layers. the diagram below demonstrate an example of a 4 layer board : ? top layer: connect the metal shield and module ground pin to bottom ground layer; place the bypass capacitors within 0.5cm from the vcc and ground pin of the module. ? layer 2: critical ground plane zone. 3 cm in all direction around the module. connect to a clean, noiseless ground node (eg bottom layer). ? layer 3: keep data bus away from critical ground plane zone. ? bottom layer: ground layer. ground noise <75 mvp-p. should be separated from ground used by noisy sources. the area underneath the module at the second layer, and 3cm in all direction around the module is defned as the critical ground plane zone. the ground plane should be maximized in this zone. refer to application note an1114 or the avago technologies irda data link design guide for details. the layout below is based on a 2-layer pcb. top layer bottom layer layer 3 top layer layer 2 bottom layer (gnd) noise sources to be placed as far away from the transceiver as possible legend: ground via cx3 cx4 cx1 cx2 r 1 r 2 cx5 appendix c: general application guide for the asdl-3023 infrared irda compliant 4 mb/s transceiver. description the asdl-3023, a wide-voltage operating range infrared transceiver is a low-cost and small form factor device that is designed to address the mobile computing market such as pdas, as well as small embedded mobile products such as digital cameras and cellular phones. it is spectrally suited to universal remote control transmission function at 940 nm typically. it is fully compliant to irda 1.4 low power specifcation up 4mb/s and support most remote control codes the design of asdl-3023 also includes the following unique features : ? spectrally suited to universal remote control transmission function at 940nm typically; ? low passive component count; ? shutdown mode for low power consumption requirement; ? direct interface with i/o logic circuit. selection of resistor r2 resistor r2 should be selected to provide the appropriate peak pulse ir and rc led current respectively at diferent ranges of vcc as shown on page 3 under recommended application circuit components. interface to the recommended i/o chip the asdl-3023s txd data input is bufered to allow for cmos drive levels. no peaking circuit or capacitor is required. data rate from 9.6kb/s to 4mb/s is available at rxd pin. the txd_rc, pin6 together with leda, pin1 is used to selected the remote control transmit mode. al - ternatively, the txd_ir, pin2 together with leda, pin1 is used for infrared transmit selection. following shows the hardware reference design with asdl-3023 *detail confguration of asdl-3023 with the controller chip is shown in figure 3. the use of the infrared techniques for data communica - tion has increase rapidly lately and almost all mobile ap - plication processors have built in the ir port. this does away with the external endec and simplifes the interfac - ing to a direct connection between the processor and the transceiver. the next section discusses interfacing confg - uration with a general processor. figure 2. mobile application platform stn/tft lcd panel logic bus driver memory expansion power management touch panel lcd backlight contrast pcm sound audio input key pad antenna mobile application chipset *asdl-3023 rom flash sdram lcd control a/d memory i/f baseband controller peripherial interface pwm ac97 sound i2s irda interface 0 general mobile application processor the transceiver is directly interface with the micropro - cessor provided its support infrared communication commonly known as infrared communications port (icp). the icp supports both sir data rates up to 115.2kps and sometimes fir data with data rates up to 4mbps. the remote control commands can be sent one of the available general purpose io pins or the uart block with irda functionality. it should be should be observed that although both irda data transmission and remote control transmission is possible simultaneously by the hardware, hence the software is required to resolve this issue to prevent the mixing and corruption of data while being transmitted over the free air. the above figure 3 illustrates a reference interfacing to implement both ir and rc functionality with asdl-3023. remote control operation the asdl-3023 is spectrally suited to universal remote control transmission function at 940nm typically. remote control applications are not governed by any standards, owing to which there are numerous remote codes in market. each of those standards results in receiver modules with diferent sensitivities, depending on the carries frequencies and responsively to the incident light wavelength. remote control carrier frequencies are in the range of 30khz to 60khz (for details of some the fre - quently used carrier frequencies, please refer to an1314). some common carrier frequencies and the correspond - ing sa-1110 uart frequency and baud rate divisor are shown in table 3. table 3. remote control carrier frequency (khz) sa-1110 uart frequency (khz) baud rate divisor 30 28.8 8 32,33 32.9 7 36,36.7,38,39.2,40 38.4 6 56 57.6 4 figure 3. asdl-3023 confguration with general mobile architecture processor gnd gnd hsdl3021 gpio txd_rc rxd sd ir_rxd gpio iovcc gnd iovcc ir_txd 100kohm txd_ir vled r3 cx4 cx3 vleda iovcc cx5 100kohm gnd gnd r1 cx1 cx2 vcc gnd vcc appendix e: window design for asdl-3023 optical port dimensions for asdl-3023 to ensure irda compliance, some constraints on the height and width of the window exist. the minimum dimensions ensure that the irda cone angles are met without vignetting. the maximum dimensions minimize the efects of stray light. the minimum size corresponds to a cone angle of 30 and the maximum size corresponds to a cone angle of 60 . k z x y d opaque material opaque material a ir transparent window t ir transparent window ir transparent window z aperture width (x) vs module depth (z) 0.00 2.00 4.00 6.00 8.00 10.00 12.00 14.00 16.00 18.00 20.00 22.00 0 1 2 3 4 5 6 7 8 9 module depth (z) mm aperture width (x) mm xmin xmax aperture height (y) vs module depth (z) 0.00 2.00 4.00 6.00 8.00 10.00 12.00 14.00 16.00 0 1 2 3 4 5 6 7 8 9 module depth (z) mm aperture height (y) mm ymin ymax module depth (z) mm aperture width (x, mm) aperture height (y, mm) min max min max 0 7.20 + w1 9.16 + w2 1.70 + w1 3.66 + w2 1 7.73 + w1 10.32 + w2 2.23 + w1 4.82 + w2 2 8.27 + w1 11.47 + w2 2.77 + w1 5.97 + w2 3 8.81 + w1 12.62 + w2 3.31 + w1 7.12 + w2 4 9.34 + w1 13.78 + w2 3.84 + w1 8.28 + w2 5 9.88 + w1 14.93 + w2 4.38 + w1 9.43 + w2 6 10.41 + w1 16.09 + w2 4.91 + w1 10.59 + w2 7 10.95 + w1 17.24 + w2 5.45 + w1 11.74 + w2 8 11.49 + w1 18.40 + w2 5.99 + w1 12.90 + w2 9 12.02 + w1 19.55 + w2 6.52 + w1 14.05 + w2 it is recommended that the tolerance for assembly be considered as well. the recommended minimum window size which will take into account of the assembly tolerance is defned as: xmin + assembly tolerance = xmin + 2*(assembly tolerance) (dimensions are in mm) ymin + assembly tolerance = ymin + 2*(assembly tolerance) (dimensions are in mm) in the fgure above, x is the width of the window, y is the height of the window and z is the distance from the asdl- 3023 to the back of the window. the distance from the center of the led lens to the center of the photodiode lens, k, is 5.5mm. the equations for computing the window dimensions are as follows: x = k + 2*(z+d)*tana y = 2*(z+d)*tana the above equations assume that the thickness of the window is negligible compared to the distance of the module from the back of the window (z). if they are comparable, w1 = 0.33*t, w2 = 0.66*t, where t is the window thickness and the refractive index of the window material is 1.586. the depth of the led image inside the asdl-3023, d, is 3.17mm. a is the required half angle for viewing. for irda compliance, the minimum is 15 and the maximum is 30 . the equations result in the following tables and graphs. the graphs are plotted assuming that the thickness of the window is negligible. window material almost any plastic material will work as a window material. polycarbonate is recommended. the surface fnish of the plastic should be smooth, without any texture. an ir flter dye may be used in the window to make it look black to the eye, but the total optical loss of the window should be 10% or less for best optical performance. light loss should be measured at 875 nm. the recommended plastic materials for use as a cosmetic window are available from general electric plastics. recommended plastic materials: material # light transmission haze refractive index lexan 141 88% 1% 1.586 lexan 920a 85% 1% 1.586 lexan 940a 85% 1% 1.586 note: 920a and 940a are more fame retardant than 141. recommended dye: violet #21051 (ir transmissant above 625mm) shape of the window from an optics standpoint, the window should be fat. this ensures that the window will not alter either the radiation pattern of the led, or the receive pattern of the photodiode. if the window must be curved for mechani - cal or industrial design reasons, place the same curve on the backside of the window that has an identical radius as the front side. while this will not completely eliminate the lens efect of the front curved surface, it will signifcantly reduce the efects. the amount of change in the radiation pattern is dependent upon the material chosen for the window, the radius of the front and back curves, and the distance from the back surface to the transceiver. once these items are known, a lens design can be made which will eliminate the efect of the front surface curve. the following drawings show the efects of a curved window on the radiation pattern. in all cases, the center thickness of the window is 1.5 mm, the window is made of polycar - bonate plastic, and the distance from the transceiver to the back surface of the window is 3 mm. flat window, (first choice) curved front and back, (second choice) curved front, flat back, (do not use) 4 appendix f: general application guide for the asdl-3023 remote control drive modes the asdl-3023 can operate in the single-txd program - mable mode or the two-txd direct transmission mode. single-txd programmable mode in the single-txd programmable mode, only one input pin (txd_ir input pin) is used to drive the led in both irda mode as well as remote control mode of operation. this mode can be used when the external controller uses only one transmit pin for both irda as well rc mode of operation. transceiver is in default mode (irda-sir) when powered up. the user needs to apply the following programming sequence to both the txd_ir and sd inputs to enable the transceiver to operate in either the irda or remote control mode. mode programming timing table the following timings describe input constraints required using the active serial interface for mode programming with pins sd, txir, and txrc: parameter symbol min typ max unit notes shutdown input pulse width, at pin sd t sdpw 30 - s will activate complete shutdown sd mode setup time t a 200 - - ns setup for mode programming txir pulse width for rc mode t b 200 - - ns rc drive enabled with pin txir sd programming pulse width note: ( ta + tb ) < tc < tsdpw t c - - 5.0 s pulse width mode programming txir setup time for sir or mir/fir mode t s 50 - - ns setup time for irda bandwidth selection txir or sd hold time to latch sir, mir/fir or rc mode t h 50 - - ns hold time for irda or rc modes two-txd direct transmission mode in the two-txd direct transmission mode, the led can be driven separately for irda and rc mode of operation through the txd_ir and txd_rc pins respectively. this mode can be used when the external controller utilizes separate transmit pins for irda and rc operation modes, thereby eliminating the need for external multiplexing. please refer to the transceiver i/o truth table for more detail. transceiver control i/o truth table for two-txd direct transmission mode sd txir txrc led remarks 0 0 0 off ir rx enabled. idle mode 0 0 1 on remote control operation 0 1 0 on irda tx operation 0 1 1 - not recommended (both transmitters of ) 1 0 0 off shutdown mode* * the shutdown condition will set the transceiver to the default mode (irda-sir) tc tb ta ttl tc shutdown drive irda led drive rc led rc mode reset drive irda led shutdown (active high) txir (active high) txrc (gnd) th th th bandwidth selection timing the power on state should be the irda sir mode. the data transfer rate must be set by a programming sequence using the txd_ir and sd inputs as described below. note: sd should not exceed the maximum, t c f 5s, to prevent shutdown. setting to the high bandwidth mir/fir mode (0.576mbits/s to 4mbits/s) 1. set sd input to logic high. wait t a 200ns 2. set txd_ir input to logic high. wait t s 50ns. 3. set sd to logic low (this negative edge latches state of txd_ir, which determines speed setting). 4. after waiting t h 50ns txd_ir can be set to logic low. txd_ir is now re-enabled as normal irda transmit input for the high bandwidth mir/fir mode. setting to the low bandwidth sir mode (2.4kbits/s to 115.2kbits/s) 1. set sd input to logic high. 2. set txir input to logic low. wait t s 50ns. 3. set sd to logic low (this negative edge latches state of txir, which determines speed setting). 4. txir must be held for t s 50ns. txir is now re-enabled as normal irda transmit input for the low bandwidth sir mode. t c high: mir/fir t s t h low: sir sd txi r 50% 50% 50% t a 50% power-up sequencing to have a proper operation for asdl-3023, the following power-up sequencing must be followed. (a) its strongly recommended that vcc must come prior to iovcc. (b) it is not recommended to turn on iovcc before vcc while sd is low. however, for application that iovcc come prior to vcc while sd is low, sd pin has to set high to assure proper function - ality. (c) setting iovcc high before vcc while sd is high is forbidden. t iovccdl 0us v cc iov cc sd t sddl 30us t sdpw 30us > ? > ? > ? v cc io v cc sd t sddl > 3 0u s t sdpw 30us ? > ? v cc iov cc sd note: t iovccd l : iovcc delay time t sddl : sd delay time t sdpw : shutdown input pulse width for product information and a complete list of distributors, please go to our web site: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies, limited in the united states and other countries. data subject to change. copyright ? 00 avago technologies limited. all rights reserved. av0 -00 4en - october 0, 00 |
Price & Availability of ASDL-3023-S21
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |